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Silicon Labs /EFR32ZG23B011F512IM40 /GPIO_S /TIMER0_ROUTEEN

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Interpret as TIMER0_ROUTEEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CC0PEN)CC0PEN 0 (CC1PEN)CC1PEN 0 (CC2PEN)CC2PEN 0 (CCC0PEN)CCC0PEN 0 (CCC1PEN)CCC1PEN 0 (CCC2PEN)CCC2PEN

Description

TIMER0 pin enable

Fields

CC0PEN

CC0 pin enable control bit
CC1PEN

CC1 pin enable control bit
CC2PEN

CC2 pin enable control bit
CCC0PEN

CCC0 pin enable control bit
CCC1PEN

CCC1 pin enable control bit
CCC2PEN

CCC2 pin enable control bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data